The present invention relates to bipolar transistor fabrication and, more particularly,to a method in a fabrication process of aligning a base insert with an emitter. A major object of the present invention is to provide a bipolar transistor with faster switching speeds for high frequency operation.
Progress in integrated circuit technology has been measured largely in terms of increasing speed and decreasing feature sizes. While bipolar technology has provided some of the fastest circuit elements available, there is still need for bipolar transistors capable of handling higher switching frequencies. A related goal is greater current handling, since higher currents are needed to overcome parasistic capacitances that impede circuit operation at high frequencies.
Base resistance is a significant impediment to high frequency operation since it dulls switching transitions and requires additional power for equivalent collector currents. Base resistance resides primarily in a lightly doped intermediate region between a highly doped base insert and a current path from an emitter to a collector. Some base resistance is required to limit base-emitter leakage currents. The length of the intermediate region which must be traversed by a base current is determined largely by the width of an oxide isolation which is used during processing to ensure physical and electrical isolation of emitter and base insert.
A bipolar transistor 100 having such an oxide isolation 126 is shown in FIG. 1. This bipolar transistor is of the npn type, including an n-type emitter 106, an n-type collector 112, and a p-type base 108. Electrical access to the base is through a base insert 116 of heavily doped p-typed material. This base insert must be electrically isolated from the emitter to avoid shorting.
The location of the emitter is defined by an emitter contact pedestal 104 through which an emitter diffusion is made during processing and through which an emitter flows during operation. The emitter contact pedestal is photo-lithographically defined along with a base contact 128 and a collector contact 130 in a polysilicon layer. Heating this structure in an oxygen environment causes an oxide isolation 126 to form locally between the emitter contact pedestal and the base contact and another oxide isolation 127 to form between the base contact and the collector contact. The base insert is introduced with the oxide isolation serving as a mask so that, even after diffusion of the base insert dopant, the emitter and the base insert remain isolated.
In operation, an emitter current can flow vertically downward from the emitter to the collector through the base and a collector drift region 110. The base current must flow at least a distance D through the lightly doped base toward the emitter current path to induce the emitter current. Since the path between the base insert and the emitter current path lies through lightly doped material, significant resistance is encountered. While lateral diffusion allows the distance D to be less than the width of the isolation oxide, there is a practical limit to which distance D can be reduced by extended diffusion. Accordingly, resistive distance D is bounded from below as a function of the width of the isolation oxide, which is in turn bounded from below by the resolution of the photo-lithographic process used to define the aperture in which the isolation oxide 126 is formed.
The present invention is directed toward reducing the distance through which base current must traverse between a base insert and an emitter current path so that the resistance encountered by the base current is reduced. The reduction of this distance permits faster switching speeds, greater current gain, and an overall decrease in device size. Thus the present invention promotes advances along several key parameters of interest in integrated circuit technology.